ISA semantics for ARMv8-A, RISC-V, and CHERI-MIPS
Alasdair Armstrong, Thomas Bauereiss, Brian Campbell, Alastair D. Reid, Kathryn E. Gray, Robert M. Norton, Prashanth Mundkur, Mark Wassell, Jon French, Christopher Pulte, Shaked Flur, Ian Stark, Neel R. Krishnaswami, Peter Sewell[doi] [Google Scholar] [DBLP] [Citeseer]
Proc. 46th ACM SIGPLAN Symposium on Principles of Programming Languages
Volume 3
Cascais/Lisbon, Portugal
ACM
New York, NY, USA
Pages 71:1-71:31
13-19 January 2019
Note(s): Arm architecture, RISCV architecture, CHERI architecture, MIPS architecture, ISA specification, instruction set architecture, dependent type, ASL, SAIL language
Volume 3
Cascais/Lisbon, Portugal
ACM
New York, NY, USA
Pages 71:1-71:31
13-19 January 2019
Note(s): Arm architecture, RISCV architecture, CHERI architecture, MIPS architecture, ISA specification, instruction set architecture, dependent type, ASL, SAIL language