Integrating memory consistency models with instruction-level abstraction for heterogeneous system-on-chip verification

Hongce Zhang, Caroline Trippel, Yatin Manerkar, Aarti Gupta, Margaret Martonosi, Sharad Malik
[doi] [Google Scholar] [DBLP] [Citeseer]

Formal Methods in Computer-Aided Design, FMCAD
2018
Note(s): weak memory, CPU verification, ISA specification