Defining interfaces between hardware and software: Quality and performance
Alastair D. Reid[Google Scholar] [DBLP] [Citeseer]
Ph.D. thesis
School of Computing Science, University of Glasgow
Glasgow, Scotland
March 2019
Note(s): ASL, Arm architecture, ISA specification, instruction set architecture, CPU verification, model checking, bounded model checking, RTL, requirements specification, remote procedure call, pipeline parallelism, continuations, threads, decoupling, SIMD, vector architecture
Papers: reid:fmcad:2016, reid:cav:2016, reid:oopsla:2017, reid:cases:2008
School of Computing Science, University of Glasgow
Glasgow, Scotland
March 2019
Note(s): ASL, Arm architecture, ISA specification, instruction set architecture, CPU verification, model checking, bounded model checking, RTL, requirements specification, remote procedure call, pipeline parallelism, continuations, threads, decoupling, SIMD, vector architecture
Papers: reid:fmcad:2016, reid:cav:2016, reid:oopsla:2017, reid:cases:2008