Rigorous engineering for hardware security: Formal modelling and proof in the CHERI design and implementation process

Kyndylan Nienhuis, Alexandre Joannou, Thomas Bauereiss, Anthony C. J. Fox, Michael Roe, Brian Campbell, Matthew Naylor, Robert M. Norton, Simon W. Moore, Peter G. Neumann, Ian Stark, Robert N. M. Watson, Peter Sewell
[doi] [Google Scholar] [DBLP] [Citeseer] [url]

2020 IEEE Symposium on Security and Privacy (SP)
IEEE Computer Society
Los Alamitos, CA, USA
Pages 1007-1024
May 2020
Note(s): CHERI architecture, capabilities
Papers: woodruff:isca:2014, skorstengaard:popl:2019, skorstengaard:esop:2018

Capabilities, CHERI architecture