Subword parallelism with MAX-2
Ruby B. Lee[doi] [Google Scholar] [DBLP] [Citeseer]
IEEE Micro
16(4)
IEEE Computer Society Press
Los Alamitos, CA, USA
Pages 51-59
August 1996
Note(s): vector architecture, instruction set architecture, SIMD
IEEE Computer Society Press
Los Alamitos, CA, USA
Pages 51-59
August 1996
Note(s): vector architecture, instruction set architecture, SIMD