Mixed-size concurrency: ARM, POWER, C/C++11, and SC

Shaked Flur, Susmit Sarkar, Christopher Pulte, Kyndylan Nienhuis, Luc Maranget, Kathryn E. Gray, Ali Sezgin, Mark Batty, Peter Sewell
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Proceedings of the 44th ACM SIGPLAN Symposium on Principles of Programming Languages
POPL 2017
Paris, France
Association for Computing Machinery
New York, NY, USA
Pages 429-442
Note(s): ISA specification, instruction set architecture, Arm architecture, PowerPC architecture