Papers related to HyperFlow: A processor architecture for nonmalleable, timing-safe information flow security
- Solver-aided constant-time hardware verification [gleissenthall:ccs:2021]
HyperFlow: A processor architecture for nonmalleable, timing-safe information flow security
Andrew Ferraiuolo, Mark Zhao, G. Edward Suh, Andrew C. Myers[doi] [Google Scholar] [DBLP] [Citeseer]
Proceedings of the 2018 ACM SIGSAC Conference on Computer and Communications Security, CCS 2018
2018
Topic(s): security
Note(s): hardware, information flow
2018
Topic(s): security
Note(s): hardware, information flow