Design and Implementation of Turbo Decoders for Software Defined Radio

Yuan Lin, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Alastair Reid, Krisztián Flautner
ARM Ltd and University of Michigan and Arizona State University
[pdf] [doi]

Proceedings of the IEEE Workshop on Signal Processing Systems (SiPS 2006)
Banff, Alberta, Canada
October 2006

Abstract

Software Defined Radio(SDR) is an emerging paradigm for wireless terminals, in which the physical layer of communication protocols is implemented in software rather than by ASICs. Many of the current and next generation wireless protocols include Turbo coding because of its superior performance. However, Turbo decoding is computationally intensive, and its low power implementations have typ- ically been in ASICs. This paper presents a case study of algorithm-architecture co-design of Turbo decoder for SDR. We present a programmable DSP architecture for SDR that includes a set of architectural features to accelerate Turbo decoder computations. We then present a parallel window scheduling for MAX-Log-MAP component decoder that matches well with the DSP architecture. Finally, we present a software implementation of Turbo decoder for W-CDMA on the DSP architecture and show that it achieves 2Mbps decoding throughput.

BibTeX

@inproceedings{DBLP:conf/sips/LinMMCRF06 , abstract = {Software Defined Radio(SDR) is an emerging paradigm for wireless terminals, in which the physical layer of communication protocols is implemented in software rather than by ASICs. Many of the current and next generation wireless protocols include Turbo coding because of its superior performance. However, Turbo decoding is computationally intensive, and its low power implementations have typ- ically been in ASICs. This paper presents a case study of algorithm-architecture co-design of Turbo decoder for SDR. We present a programmable DSP architecture for SDR that includes a set of architectural features to accelerate Turbo decoder computations. We then present a parallel window scheduling for MAX-Log-MAP component decoder that matches well with the DSP architecture. Finally, we present a software implementation of Turbo decoder for W-CDMA on the DSP architecture and show that it achieves 2Mbps decoding throughput.} , affiliation = {ARM Ltd and University of Michigan and Arizona State University} , ar_file = {SiPS_06} , ar_shortname = {SiPS 06} , author = {Yuan Lin and Scott A. Mahlke and Trevor N. Mudge and Chaitali Chakrabarti and Alastair Reid and Kriszti{\'a}n Flautner} , booktitle = {Proceedings of the {IEEE} Workshop on Signal Processing Systems (SiPS 2006)} , day = {2-4} , doi = {10.1109/SIPS.2006.352549} , file = {lin-sips06.pdf} , location = {Banff, Alberta, Canada} , month = {October} , pages = {22--27} , publisher = {IEEE} , title = {{D}esign and {I}mplementation of {T}urbo {D}ecoders for {S}oftware {D}efined {R}adio} , year = {2006} }